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Evaluator for PIC16F877 (by Evan Raftery)
I uploaded schematic for test board for 40pin 887 or 877 pic
The jumpers can be arranged for different analog signals ranging from 0-50mV, 0-100mV 0-5V, 1-5V, 0-10V on the Inputs.
I figured that people here who like ladder would be also like analog out so has PWM conversion to 0-5V, 4-20mA & 0-10V.
Information was derived from interface tutorial plus other sources on net.
Programming is via 9pin connector & outputs are through logic level mosfets.
Inputs are polarity changeable to accept either PNP or NPN inputs.
There is undoubtably many errors here. The power supply to board is via a 24VDC
The voltage taps are via zener regulated circuits to step down to 8 & 15V before voltage regulators step dwn to 5 & 12V.
I did this because I don't know how hot the 78xx regulators would get if they step down directly from 24V DC.
Also probably errors in the RS 232 circuit. Will get board made if it looks feasible.
(no subject) (by Evan Raftery)
Also layout in eagle.
(no subject) (by Ilie)
Dip Trace softwere , after import .
(no subject) (by Jonathan Westhues)
There's a few issues. The circuits with the Zener diodes aren't really great; they waste power and limit your output current.
It would be better just to size the heat sinks for the 78xx regulators correctly. They burn P = I*(Vout - Vin). So if you want the heat sink around 90 degrees C, for example, then you're looking for a heat sink with a thermal resistance of (90 - 30)/P K/W, assuming 30 degrees ambient. (And I'm ignoring the thermal resistance from the junction to the case here, but for a TO-220 package and a small heat sink, it's probably not significant.)
IC2x can't possibly be right.
What are the diodes D3-D13 doing? They don't protect against the high voltage generated by an inductive load.
It would be good to redraw the schematic with fewer intersecting lines, by using net labels and supply symbols (Vdd, +5V, +12V, GND) more. That would make some of the problems obvious.
(no subject) (by Evan Raftery)
Thanks,
I have removed d3-d13. I put them there in case an incorrect connection was made to terminals.
The zeners now gone too. Will screw TO220s to common heatsink with the FETS.
In IC2* the MCP602 should read MCP601. I couldn't swap parts with the MCP602 because of issue with gates in Eagle. Is there still an issue with this circuit as a MCP601?
Likewise the UA741 chip should read LM358 as had similar pinout.
Will ammend and resend.
Also will send jumper chart.
Thanks again
(no subject) (by Evan Raftery)
Updated pdf for pic board
(no subject) (by Evan Raftery)
And updated .sch for same.
(no subject) (by Evan Raftery)
The IRF540 logic level mosfet has diode built into ciruit for inductive load. Is it still recommended to fit diode across mosfet?
(no subject) (by Jonathan Westhues)
The FET is rated for avalanche breakdown, with a maximum energy of 13 mJ. So as long as the energy stored in the load is less than that, you're okay. If the pulse energy is bigger, then an additional clamp is required.
(The avalanche energy spec is essentially a transient thermal specification. The pulse is very fast, so there's no time for heat to conduct out of the die. So it's determined by the max die temperature and the die's heat capacity.)
It's also worth noting that >100 V may appear at the drain of the FET when it turns off, which may cause EMI issues, or couple through the Cgd back to the PIC. The clamp diode limits your drain voltage to (24 + 0.6) V, and may solve those problems.
(no subject) (by Evan Raftery)
The final drawings which board based on. Should be ready for test in couple of days. The 741 should read LM358 & the 602 should be a 601 hence the 3 NC terminals.
(no subject) (by Evan Raftery)
And the .sch file for it.
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