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LDmicro Forum - generate C file on virtual uC

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generate C file on virtual uC (by Calin (Roumania))
I would like to increase the LD MICRO development opportunities for a better translation in ANSIC.
I think a good option would be a virtual uC, with all the facilities, I / O port, ADC, USART [buffer], EEPROM, with their functions call in LD MICRO and inplementated in files such i_o_config.h, ladder.h, etc..
In ldmicro-rel2.2beta1 I put an example in the folder "\ ldmicro-rel2.2beta1 \ project \ C PROG". Using C, I could program a PIC18F or virtually any uC and the best thing is that in this way i can use INTERRUPT routins.
Mon Jan 14 2013, 02:08:13, download attachment ldmicro-rel2.2beta1.rar
(no subject) (by Chris)
This version has intermediary code dumping on (t.pl).
Actually, the defines for b_.... and v_ define is missing,
but could be added without problems.
Code dumping was changed to C like syntax.
I donīt are interested in learning this intermediate language.

#define setbit(x) bits[x>>3]|=(1<<(x&7))
#define clrbit(x) bits[x>>3]&=~(1<<(x&7))
#define tstbit(x) bits[x>>3]&(1<<(x&7))
#define cpybit(x,y) (tstbit(x)?setbit(y):clrbit(y))

but probably, for a release, this should be renamed to
ld_setbit ld_clrbit ld_tstbit ld_cpybit

Every C compiler optimize this to bit instructions.

other macros:
ld_pwm(x,y)
ld_eebusy(x)
ld_eeread(x)
ld_eewrite(x,y)
ld_uart_tx(x,y)
ld_uart_rx(x,y)

I personally like this more simpler approach.


Sample output from pot_time

0: setbit(b_mcr);
1: //
2: // start rung 1
3: cpybit(b_mcr,b_rung_top);
4:
5: // start series [
6: // start parallel [
7: clrbit(b_parOut_0000);
8: cpybit(b_rung_top,b_parThis_0000);
9: // start series [
10: if (!tstbit(b__Xinput)) {
11: clrbit(b_parThis_0000);
12: }
13:
14: // start parallel [
15: clrbit(b_parOut_0001);
16: cpybit(b_parThis_0000,b_parThis_0001);
17: cpybit(b_parThis_0001,b_scratch);
18: if (tstbit(b_oneShot_0000)) {
19: clrbit(b_parThis_0001);
20: }
21: cpybit(b_scratch,b_oneShot_0000);
22:
23: if (tstbit(b_parThis_0001)) {
24: setbit(b_parOut_0001);
25: }
26: cpybit(b_parThis_0000,b_parThis_0001);
27: cpybit(b_parThis_0001,b_scratch);
28: if (!tstbit(b_parThis_0001)) {
29: if (tstbit(b_oneShot_0001)) {
30: setbit(b_parThis_0001);
31: }
32: } else {
33: clrbit(b_parThis_0001);
34: }
35: cpybit(b_scratch,b_oneShot_0001);
36:
37: if (tstbit(b_parThis_0001)) {
38: setbit(b_parOut_0001);
39: }
40: cpybit(b_parOut_0001,b_parThis_0000);
41: // ] finish parallel
42: // ] finish series
43: if (tstbit(b_parThis_0000)) {
44: setbit(b_parOut_0000);
45: }
46: cpybit(b_rung_top,b_parThis_0000);
47: if (tstbit(b__Rinit_done)) {
48: clrbit(b_parThis_0000);
49: }
50:
51: if (tstbit(b_parThis_0000)) {
52: setbit(b_parOut_0000);
53: }
54: cpybit(b_parOut_0000,b_rung_top);
55: // ] finish parallel
56: // start parallel [
57: clrbit(b_parOut_0002);
58: cpybit(b_rung_top,b_parThis_0002);
59: if (tstbit(b_parThis_0002)) {
60: v__Atime=getadc(v__Atime)
61: }
62:
63: if (tstbit(b_parThis_0002)) {
64: setbit(b_parOut_0002);
65: }
66: cpybit(b_rung_top,b_parThis_0002);
67: if (!tstbit(b_mcr)) {
68: setbit(b_mcr);
69: } else {
70: cpybit(b_parThis_0002,b_mcr);
71: }
72:
73: if (tstbit(b_parThis_0002)) {
74: setbit(b_parOut_0002);
75: }
76: cpybit(b_parOut_0002,b_rung_top);
77: // ] finish parallel
78: // ] finish series
79: //
80: // start rung 2
81: cpybit(b_mcr,b_rung_top);
82:
83: // start series [
84: // start parallel [
85: clrbit(b_parOut_0003);
86: cpybit(b_rung_top,b_parThis_0003);
87: if (tstbit(b_parThis_0003)) {
88: v_scratch2 = 3;
89: v__Atime = v__Atime * v_scratch2;
90: }
91:
92: if (tstbit(b_parThis_0003)) {
93: setbit(b_parOut_0003);
94: }
95: cpybit(b_rung_top,b_parThis_0003);
96: if (tstbit(b_parThis_0003)) {
97: v_scratch2 = 100;
98: v__Atime = v__Atime + v_scratch2;
99: }
100:
101: if (tstbit(b_parThis_0003)) {
102: setbit(b_parOut_0003);
103: }
104: cpybit(b_parOut_0003,b_rung_top);
105: // ] finish parallel
106: // ] finish series
107: //
108: // start rung 3
109: cpybit(b_mcr,b_rung_top);
110:
111: // start series [
112: if (!tstbit(b_mcr)) {
113: setbit(b_mcr);
114: } else {
115: cpybit(b_rung_top,b_mcr);
116: }
117:
118: // ] finish series
119: //
120: // start rung 4
121: cpybit(b_mcr,b_rung_top);
122:
123: // start series [
124: if (!tstbit(b__Xinput)) {
125: clrbit(b_rung_top);
126: }
127:
128: // start parallel [
129: clrbit(b_parOut_0004);
130: cpybit(b_rung_top,b_parThis_0004);
131: // start series [
132: v_scratch2 = 0;
133: if (v__Atime > v_scratch2) {
134: } else {
135: clrbit(b_parThis_0004);
136: }
137:
138: if (tstbit(b_parThis_0004)) {
139: v_scratch2 = 1;
140: v__Atime = v__Atime - v_scratch2;
141: }
142:
143: // ] finish series
144: if (tstbit(b_parThis_0004)) {
145: setbit(b_parOut_0004);
146: }
147: cpybit(b_rung_top,b_parThis_0004);
148: // start series [
149: v_scratch2 = 0;
150: if (v__Atime == v_scratch2) {
151: } else {
152: clrbit(b_parThis_0004);
153: }
154:
155: cpybit(b_parThis_0004,b__Youtput);
156:
157: // ] finish series
158: if (tstbit(b_parThis_0004)) {
159: setbit(b_parOut_0004);
160: }
161: cpybit(b_parOut_0004,b_rung_top);
162: // ] finish parallel
163: // ] finish series
164: //
165: // start rung 5
166: cpybit(b_mcr,b_rung_top);
167:
168: // start series [
169: cpybit(b_rung_top,b__Rinit_done);
170:
171: // ] finish series

LDmicro export text
no MCU assigned, 4.000000 MHz crystal, 10.0 ms cycle time


LADDER DIAGRAM:

|| ||
|| Xinput _ ATime ||
001||-------] [------+----[OSR_/ ]----+--------------------{READ ADC}---- ||
|| | | ||
|| | _ | ||
|| +----[OSF \_]----+-------------------{MASTER RLY}--- ||
|| | ||
|| Rinit_done | ||
||-------]/[-----------------------+ ||
|| ||
|| ||
|| ||
|| ||
|| {MUL Atime :=} ||
002||-------------------------------------------{ Atime * 3 }--------- ||
|| ||
|| {ADD Atime :=} ||
||-------------------------------------------{ Atime + 100 }--------- ||
|| ||
|| ||
|| ||
|| ||
|| ||
003||-----------------------------------------------------{MASTER RLY}--- ||
|| ||
|| ||
|| ||
|| ||
|| Xinput [Atime >] {SUB Atime :=} ||
004||-------] [------+----[ 0 ]-------------{ Atime - 1 }--------- ||
|| | ||
|| | [Atime ==] Youtput ||
|| +---[ 0 ]----------------------------( )------- ||
|| ||
|| ||
|| ||
|| ||
|| Rinit_done ||
005||----------------------------------------------------------( )------- ||
|| ||
|| ||
|| ||
||------[END]--------------------------------------------------------- ||
|| ||
|| ||


I/O ASSIGNMENT:

Name | Type | Pin
----------------------------+--------------------+------
Xinput | digital in | (not assigned)
Youtput | digital out | (not assigned)
ATime | adc input | (not assigned)
Rinit_done | int. relay |
Atime | general var |
Mon Jan 14 2013, 04:08:55, download attachment exe.zip
(no subject) (by Calin (Roumania))
I think it's a misunderstanding. Intermediate code is ok, but I thought the "Settings / Microcontroller / ANCI C code" to generate real C code that can be used in a compiler such as HIGH-TECH C Compiler. Sorry but my English is weird. Try to look more carefully at the example sent. Thanks a lot Calin
Mon Jan 14 2013, 11:56:58
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