Pseudo code for 8 bit oriented virtual machine
All codes are single argument, syntax is CALM compatible

ALU is constitued by

1	single bit register $Bit
3	signed 16 bits registers A, B and R
1	table pointer
1   signed 8 bits TimerTicks register $TimerTicks
1   8 bits status register $Status (C, Z, N, V, $Bit)
1	stack (optional)
1   16 bits PC

======== Single bit instructions

Mnemonic

- vmSetBit				dest
- vmClearBit			dest
- vmGetBit				scr (get internal $Bit from a bit)
- vmPutBit				dest(put internal $Bit to a bit)
- vmSkipIfBitSet		src
- vmSkipIfBitClear		src

4 addressing mode [2 bits] 
- .r    internal (default)
- .io   i/o
- .x    external
- .s    special 

6 [24] instructions

$Bit can be manipulated by bits instructions (vmStatus:#Bit)

======== 16 bits signed Math instructions

Mnemonic

- vmClear   		dest
- vmLoadA   		src
- vmLoadB   		src
- vmLoadR 			src (for test, copy and assign) 
- vmIndexA      	src ( A = Tbl[src] )
- vmIndexB			src ( B = Tbl[src] )
- vmStoreR  		dest (owerflow set)
- vmAdd				dest ( R = A + B, R -> dest )
- vmSub				dest		
- vmMul				dest
- vmDiv				dest
- vmInc   			dest  (saturation, zero, overflow set)
- vmDec    			dest  (saturation, zero, overflow set)
- vmIncTmr	 		dest  (special for timer, use TimerTick, zero, overflow set)
- vmDecTmr 			dest  (special for timer, use TimerTick, zero, overflow set)
- vmPush			src
- vmPop				dest

argument size [1 bit]
- .8 / .16			signed 8/16 bits
addressing mode [2 bits]
- .l .no 			litteral for src / no destination for dest
- .r  				internal 
- .a  				absolute variable
- .s  				special

17 [136] instructions

Registers can be used in src/dest : example $RegisterA, $RegisterAL, $RegisterAH

======== Control instruction

- vmTestR
- vmSkipIfFlagSet	flags (skip if one of the flags is set)
- vmSkipIfFlagClear	flags (skip if one of the flags is clear)
- vmClearFlags		flags (clear specified flags)
- vmSetFlags		flags (set specified flags)
- vmSelectTable		addrs (select the table for indexed register loading)
- vmGoto			addrs (in ladder program)
- vmCall			extn  (external call)

10 [10+xx] instructions

======== Special instruction

Not yet fully specified

- ADC			src
- PWM			dest
- TxUART		src
- RxUART		dest
- WrI2C
- RdI2C
- WrSPI
- RdSPI
- WrEEPROM
- RdEEPROM

xx instructions


=============================================================================================

Total < [256] instructions : OpCode size byte compatible 

- 5,6,8 bits instructions depending addressing mode
- 0,2,3 bits addressing mode

It's easy to contruct a virtual machine on 8 bits processor, for example
- 24 bits (3 bytes) instruction code (OpCode 8 bits, operand 16 bits)
- Easy implementation in 14 bits word of PIC16 familly
- JumpTable for the 256 possible instructions
- All feature of the target mcu can be accessed
- code more efficient with the indexed table access

Bits operands can be coded in 16 bits operand
- 13 bits for absolute memory address
- 3  bits for bit access #